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ASPDAC
2010
ACM
143views Hardware» more  ASPDAC 2010»
14 years 8 months ago
A low latency wormhole router for asynchronous on-chip networks
Asynchronous on-chip networks are power efficient and tolerant to process variation but they are slower than synchronous on-chip networks. A low latency asynchronous wormhole route...
Wei Song, Doug Edwards
ASPDAC
2010
ACM
143views Hardware» more  ASPDAC 2010»
14 years 8 months ago
Constrained global scheduling of streaming applications on MPSoCs
Abstract-- We present a global scheduling framework for synchronous data flow (SDF) streaming applications on MPSoCs, based on optimized computation and contention-free routing. Th...
Jun Zhu, Ingo Sander, Axel Jantsch
ASPDAC
2010
ACM
163views Hardware» more  ASPDAC 2010»
14 years 8 months ago
A PUF design for secure FPGA-based embedded systems
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy...
Jason Helge Anderson
ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
14 years 8 months ago
Improved on-chip router analytical power and area modeling
Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence o...
Andrew B. Kahng, Bill Lin, Kambiz Samadi
ASPDAC
2010
ACM
135views Hardware» more  ASPDAC 2010»
14 years 8 months ago
Statistical timing verification for transparently latched circuits through structural graph traversal
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
Xingliang Yuan, Jia Wang