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    ASPDAC
    2011
    ACM
    173views Hardware» more  ASPDAC 2011»
    Device-parameter estimation with on-chip variation sensors considering random variability
    12 years 10 months ago
    Device-parameter estimation with on-chip variation sensors considering random variability
    Download  www.tauworkshop.com
    Kenichi Shinkai, Masanori Hashimoto
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    ASPDAC
    2011
    ACM
    183views Hardware» more  ASPDAC 2011»
    Multi-core parallel simulation of System-level Description Languages
    12 years 10 months ago
    Multi-core parallel simulation of System-level Description Languages
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    Rainer Dömer, Weiwei Chen, Xu Han, Andreas Ge...
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    ASPDAC
    2011
    ACM
    172views Hardware» more  ASPDAC 2011»
    Managing complexity in design debugging with sequential abstraction and refinement
    12 years 10 months ago
    Managing complexity in design debugging with sequential abstraction and refinement
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    al Abstraction and Refinement Brian Keng and Andreas Veneris University of Toronto ASPASP--DAC 2011DAC 2011
    Brian Keng, Andreas G. Veneris
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    ASPDAC
    2011
    ACM
    215views Hardware» more  ASPDAC 2011»
    An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
    12 years 10 months ago
    An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
    Download  www.kameyama.ecei.tohoku.ac.jp
    —This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
    Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama...
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    ASPDAC
    2011
    ACM
    227views Hardware» more  ASPDAC 2011»
    Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
    12 years 10 months ago
    Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
    Download  peace.snu.ac.kr
    – This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This paper assumes static mapping and dynamic scheduling of nodes, which has seve...
    Tae-ho Shin, Hyunok Oh, Soonhoi Ha
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