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156
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GLVLSI
2007
IEEE
16 years 7 days ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
195
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GLVLSI
2007
IEEE
16 years 7 days ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
154
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GLVLSI
2007
IEEE
16 years 7 days ago
2007
IEEE
We describe an efficient, top-down strategy for overlap removal and floorplan repair which repairs overlaps in floorplans produced by placement algorithms or rough floorplanni...
140
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GLVLSI
2007
IEEE
16 years 7 days ago
2007
IEEE
Leakage power dissipation is one of the most critical factors for the overall current dissipation and future designs. However, design techniques for the reduction of leakage power...
157
click to vote
GLVLSI
2007
IEEE
16 years 7 days ago
2007
IEEE
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...