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DAC
1996
ACM
15 years 1 months ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten
DAC
1996
ACM
15 years 1 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
DAC
1996
ACM
15 years 1 months ago
A Register File and Scheduling Model for Application Specific Processor Synthesis
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
Ehat Ercanli, Christos A. Papachristou
DAC
1996
ACM
15 years 1 months ago
RTL Emulation: The Next Leap in System Verification
ion. Production use of text-based methodology has enabled designers to capture designs of hundreds of thousands of gates using graphic ESDA tools. Source: Data Quest (Verilog/VHDL ...
Sanjay Sawant, Paul Giordano
DAC
1996
ACM
15 years 1 months ago
A Parallel Precorrected FFT Based Capacitance Extraction Program for Signal Integrity Analysis
In order to optimize interconnect to avoid signal integrity problems, very fast and accurate 3-D capacitance extraction is essential. Fast algorithms, such as the multipole or prec...
Narayan R. Aluru, V. B. Nadkarni, James White