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DAC
1999
ACM
15 years 1 months ago
Verification and Management of a Multimillion-Gate Embedded Core Design
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
Johann Notbauer, Thomas W. Albrecht, Georg Niedris...
DAC
1999
ACM
15 years 1 months ago
A Floorplan-Based Planning Methodology for Power and Clock Distribution in ASICs
In deep submicron technology, IR-drop and clock skew issues become more crucial to the functionality of chip. This paper presents a oorplan-based power and clock distribution meth...
Joon-Seo Yim, Seong-Ok Bae, Chong-Min Kyung
DAC
2000
ACM
15 years 1 months ago
Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability
—Chemical–mechanical polishing (CMP) is an enabling technique used in deep-submicrometer VLSI manufacturing to achieve long range oxide planarization. Post-CMP oxide topography...
Ruiqi Tian, D. F. Wong, Robert Boone
CORR
2000
Springer
84views Education» more  CORR 2000»
14 years 9 months ago
The Role of Commutativity in Constraint Propagation Algorithms
stract setting. Then we instantiate this algorithm with specific partial orderings and functions to obtain specific constraint propagation algorithms. In particular, using the noti...
Krzysztof R. Apt
DAC
1999
ACM
15 years 1 months ago
Using Lower Bounds During Dynamic BDD Minimization
Ordered Binary Decision Diagrams BDDs are a data structure for representation and manipulation of Boolean functions often applied in VLSI CAD. The choice of the variable orderin...
Rolf Drechsler, Wolfgang Günther