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2009
IEEE
122views Hardware» more  DATE 2009»
16 years 5 days ago
A highly resilient routing algorithm for fault-tolerant NoCs
Current trends in technology scaling foreshadow worsening transistor reliability as well as greater numbers of transistors in each system. The combination of these factors will so...
David Fick, Andrew DeOrio, Gregory K. Chen, Valeri...
DATE
2009
IEEE
139views Hardware» more  DATE 2009»
16 years 5 days ago
Cross-architectural design space exploration tool for reconfigurable processors
—Processors that deploy fine-grained reconfigurable fabrics to implement application-specific accelerators ondemand obtained significant attention within the last decade. They tr...
Lars Bauer, Muhammad Shafique, Jörg Henkel
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 5 days ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
DATE
2009
IEEE
111views Hardware» more  DATE 2009»
16 years 5 days ago
Enabling concurrent clock and power gating in an industrial design flow
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
Leticia Maria Veiras Bolzani, Andrea Calimera, Alb...
DATE
2009
IEEE
124views Hardware» more  DATE 2009»
16 years 5 days ago
Design and implementation of scalable, transparent threads for multi-core media processor
—In this paper, we propose a scalable and transparent parallelization scheme using threads for multi-core processor. The performance achieved by our scheme is scalable to the num...
Takeshi Kodaka, Shunsuke Sasaki, Takahiro Tokuyosh...