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DATE
2007
IEEE
150views Hardware» more  DATE 2007»
15 years 4 months ago
Assessing carbon nanotube bundle interconnect for future FPGA architectures
Field Programmable Gate Arrays (FPGAs) are important hardware platforms in various applications due to increasing design complexity and mask costs. However, as CMOS process techno...
Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen,...
IPPS
2007
IEEE
15 years 4 months ago
Using an FPGA for Fast Bit Accurate SoC Simulation
In this paper we describe a sequential simulation method to simulate large parallel homo- and heterogeneous systems on a single FPGA. The method is applicable for parallel systems...
Pascal T. Wolkotte, Philip K. F. Hölzenspies,...
ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
15 years 4 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
15 years 4 months ago
Collaborative Routing Architecture for FPGA
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
Yaling Ma, Mingjie Lin
MAM
2007
157views more  MAM 2007»
14 years 10 months ago
Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
Darrin M. Hanna, Michael DuChene