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AHS
2007
IEEE
277views Hardware» more  AHS 2007»
15 years 4 months ago
Maxwell - a 64 FPGA Supercomputer
We present the initial results from the FHPCA Supercomputer project at the University of Edinburgh. The project has successfully built a general-purpose 64 FPGA computer and porte...
Robert Baxter, Stephen Booth, Mark Bull, Geoff Caw...
DSD
2007
IEEE
116views Hardware» more  DSD 2007»
15 years 4 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
ICC
2007
IEEE
114views Communications» more  ICC 2007»
15 years 4 months ago
An FPGA Implementation of Dirty Paper Precoder
—Dirty paper code (DPC) can be used in a number of communication network applications; broadcast channels, multiuser interference channels and ISI channels to name a few. We stud...
Pankaj Bhagawat, Weihuang Wang, Momin Uppal, Gwan ...
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IPPS
2007
IEEE
15 years 4 months ago
C++ based System Synthesis of Real-Time Video Processing Systems targeting FPGA Implementation
Implementing real-time video processing systems put high requirements on computation and memory performance. FPGAs have proven to be effective implementation architecture for thes...
Najeem Lawal, Mattias O'Nils, Benny Thörnberg
CHES
2007
Springer
165views Cryptology» more  CHES 2007»
15 years 4 months ago
FPGA Intrinsic PUFs and Their Use for IP Protection
In recent years, IP protection of FPGA hardware designs has become a requirement for many IP vendors. In [34], Simpson and Schaumont proposed a fundamentally different approach to...
Jorge Guajardo, Sandeep S. Kumar, Geert Jan Schrij...