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DATE
2007
IEEE
110views Hardware» more  DATE 2007»
15 years 4 months ago
Reconfigurable system-on-chip data processing units for space imaging instruments
Individual Data Processing Units (DPUs) are commonly used for operational control and specific data processing of scientific space instruments. To overcome the limitations of trad...
Björn Fiethe, Harald Michalik, C. Dierker, Bj...
DSD
2007
IEEE
178views Hardware» more  DSD 2007»
15 years 4 months ago
An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding
In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard. The ha...
Esra Sahin, Ilker Hamzaoglu
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
15 years 4 months ago
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
Henrique C. Freitas, Dalton M. Colombo, Fernanda L...
SAMOS
2007
Springer
15 years 4 months ago
A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications
—This paper describes the design of a programmable coprocessor for Public Key Cryptography (PKC) on an FPGA. The implementation provides a very broad range of functions together ...
Nele Mentens, Kazuo Sakiyama, Lejla Batina, Bart P...
ASAP
2007
IEEE
130views Hardware» more  ASAP 2007»
15 years 2 months ago
A Self-Reconfigurable Implementation of the JPEG Encoder
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...