In this paper, we propose a systemic approach for synthesizing field-programmable gate array (FPGA) implementations of fast Fourier transform (FFT) computations. Our approach cons...
Hojin Kee, Newton Petersen, Jacob Kornerup, Shuvra...
We present an in-depth analysis of the Xilinx bitstream format. The information gathered in this paper allows bitstream compilation and decompilation. While not actually compromis...
This paper introduces a method of constructing random number generators from four of the basic primitives provided by FPGAs: Flip-Flips, Lookup-Tables, Shift Registers, and RAMs. ...
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
We describe the implementation of an OpenFlow Switch on the NetFPGA platform. OpenFlow is a way to deploy experimental or new protocols in networks that carry production traffic. ...
Jad Naous, David Erickson, G. Adam Covington, Guid...