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iccad 2004
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SPIN-TEST: automatic test pattern generation for speed-independent circuits
16 years 7 days ago
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Feng Shi, Yiorgos Makris
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M-trie: an efficient approach to on-chip logic minimization
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Seraj Ahmad, Rabi N. Mahapatra
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A quantitative study and estimation models for extensible instructions in embedded processors
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Newton Cheung, Sri Parameswaran, Jörg Henkel
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Timing analysis considering spatial power/ground level variation
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www-ise2.ist.osaka-u.ac.jp
Masanori Hashimoto, Junji Yamaguchi, Hidetoshi Ono...
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Hardware/software managed scratchpad memory for embedded system
16 years 7 days ago
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Andhi Janapsatya, Sri Parameswaran, Aleksandar Ign...
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