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IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
Stencil computations form the performance-critical core of many applications. Tiling and parallelization are two important optimizations to speed up stencil computations. Many til...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper, an almost peer-to-peer (AP2P) clock synchronization protocol is proposed. AP2P is almost peer-topeer in the sense that it provides the desirable features of a purel...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
Parallelization of sequential programs is often daunting because of the substantial development cost involved. Various solutions have been proposed to address this concern, includ...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
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IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...