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HPCA
2003
IEEE
15 years 11 months ago
Dynamic Optimization of Micro-Operations
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
Brian Slechta, David Crowe, Brian Fahs, Michael Fe...
75
Voted
SBACPAD
2008
IEEE
100views Hardware» more  SBACPAD 2008»
15 years 5 months ago
Selection of the Register File Size and the Resource Allocation Policy on SMT Processors
The performance impact of the Physical Register File (PRF) size on Simultaneous Multithreading processors has not been extensively studied in spite of being a critical shared reso...
Jesús Alastruey, Teresa Monreal, Francisco ...
IPPS
2007
IEEE
15 years 5 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
ECTEL
2007
Springer
15 years 5 months ago
Reflections on Digital Literacy
Parallel to the societal diffusion of digital technologies, the debate on their impacts and requirements has created terms like ICT literacy, digital literacy or digital competenc...
Harald Gapski
HIPEAC
2007
Springer
15 years 5 months ago
Branch History Matching: Branch Predictor Warmup for Sampled Simulation
Computer architects and designers rely heavily on simulation. The downside of simulation is that it is very time-consuming — simulating an industry-standard benchmark on todayâ€...
Simon Kluyskens, Lieven Eeckhout