On a distributed memory machine, hand-coded message passing leads to the most efficient execution, but it is difficult to use. Parallelizing compilers can approach the performance...
-- This paper presents an efficient method for the timing verification of concurrent systems, modeled as labeled Timed Petri nets. The verification problems we consider require us ...
Compiler optimization techniques have been applied to facilitate development and performance tuning of non-real-time systems. Unfortunately, regular compiler optimization can comp...
Mohamed F. Younis, Thomas J. Marlowe, Grace Tsai, ...
This paper presents a new concept for accurate modeling and timing simulationof electronicsystems integrated in a typical VHDL design environment, taking into account the requirem...
We propose a video enhancement sensor for smoothing random noise and getting wide dynamic range. The sensor has computational elements based on a column-parallel architecture. It ...