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ISCAS
2007
IEEE
76views Hardware» more  ISCAS 2007»
15 years 6 months ago
In Vitro Epileptic Seizure Prediction Microsystem
— The architecture and VLSI implementation of an epileptic seizure prediction microsystem are presented. The microsystem comprises a neural recording interface and a seizure pred...
J. N. Y. Aziz, Rafal Karakiewicz, Roman Genov, A. ...
ISVLSI
2007
IEEE
100views VLSI» more  ISVLSI 2007»
15 years 6 months ago
Vector Processing Support for FPGA-Oriented High Performance Applications
In this paper, we propose and implement a vector processing system that includes two identical vector microprocessors embedded in two FPGA chips. Each vector microprocessor suppor...
Hongyan Yang, Shuai Wang, Sotirios G. Ziavras, Jie...
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
15 years 6 months ago
A Quantum Algorithm for Finding Minimum Exclusive-Or Expressions
This paper presents a quantum algorithm for finding minimal ESCT (Exclusive-or Sum of Complex Terms) or ESOP (Exclusiveor Sum Of Products) expressions for any arbitrary incomplet...
Marinos Sampson, Dimitrios Voudouris, George K. Pa...
84
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ISAAC
2007
Springer
124views Algorithms» more  ISAAC 2007»
15 years 6 months ago
Approximating the Crossing Number of Toroidal Graphs
Abstract. CrossingNumber is one of the most challenging algorithmic problems in topological graph theory, with applications to graph drawing and VLSI layout. No polynomial time con...
Petr Hlinený, Gelasio Salazar
125
Voted
GLVLSI
2007
IEEE
328views VLSI» more  GLVLSI 2007»
15 years 6 months ago
New timing and routability driven placement algorithms for FPGA synthesis
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong H...