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FCCM
2007
IEEE
115views VLSI» more  FCCM 2007»
15 years 6 months ago
Generating FPGA-Accelerated DFT Libraries
We present a domain-specific approach to generate highperformance hardware-software partitioned implementations of the discrete Fourier transform (DFT) in fixed point precision....
Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryh...
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 6 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
FCCM
2007
IEEE
134views VLSI» more  FCCM 2007»
15 years 6 months ago
FPGA-accelerated seed generation in Mercury BLASTP
BLASTP is the most popular tool to perform comparative sequence analysis of protein sequences. An exponential increase in the size of protein sequence databases in recent years, h...
Arpith C. Jacob, Joseph M. Lancaster, Jeremy Buhle...
IJCNN
2007
IEEE
15 years 6 months ago
Implementation of multi-layer leaky integrator networks on a cellular processor array
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...
David R. W. Barr, Piotr Dudek, Jonathan M. Chamber...
IPPS
2007
IEEE
15 years 6 months ago
Performance Modelling of Necklace Hypercubes
The necklace hypercube has recently been introduced as an attractive alternative to the well-known hypercube. Previous research on this network topology has mainly focused on topo...
Sina Meraji, Hamid Sarbazi-Azad, Ahmad Patooghy