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ASPDAC
2011
ACM
172views Hardware» more  ASPDAC 2011»
14 years 8 months ago
Managing complexity in design debugging with sequential abstraction and refinement
al Abstraction and Refinement Brian Keng and Andreas Veneris University of Toronto ASPASP--DAC 2011DAC 2011
Brian Keng, Andreas G. Veneris
ASPDAC
2011
ACM
215views Hardware» more  ASPDAC 2011»
14 years 8 months ago
An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
—This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama...
ASPDAC
2011
ACM
167views Hardware» more  ASPDAC 2011»
14 years 8 months ago
Variation-tolerant and self-repair design methodology for low temperature polycrystalline silicon liquid crystal and organic lig
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
Chih-Hsiang Ho, Chao Lu, Debabrata Mohapatra, Kaus...
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
14 years 8 months ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
ASPDAC
2011
ACM
193views Hardware» more  ASPDAC 2011»
14 years 8 months ago
A structured parallel periodic Arnoldi shooting algorithm for RF-PSS analysis based on GPU platforms
The recent multi/many-core CPUs or GPUs have provided an ideal parallel computing platform to accelerate the timeconsuming analysis of radio-frequency/millimeter-wave (RF/ MM) int...
Xuexin Liu, Hao Yu, Jacob Relles, Sheldon X.-D. Ta...
ASPDAC
2011
ACM
227views Hardware» more  ASPDAC 2011»
14 years 8 months ago
Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph
– This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This paper assumes static mapping and dynamic scheduling of nodes, which has seve...
Tae-ho Shin, Hyunok Oh, Soonhoi Ha
ASPDAC
2011
ACM
183views Hardware» more  ASPDAC 2011»
14 years 8 months ago
Multi-core parallel simulation of System-level Description Languages
Rainer Dömer, Weiwei Chen, Xu Han, Andreas Ge...
ASMTA
2011
Springer
295views Mathematics» more  ASMTA 2011»
14 years 8 months ago
Performance Evaluation of a Single Node with General Arrivals and Service
Queueing delays experienced by packets buffered at a node are among the most difficult to predict when considering the performance of a flow in a network. The arrivals of packets a...
Alexandre Brandwajn, Thomas Begin
ASE
2011
14 years 8 months ago
Alattin: mining alternative patterns for defect detection
Abstract To improve software quality, static or dynamic defect-detection tools accept programming rules as input and detect their violations in software as defects. As these progra...
Suresh Thummalapenta, Tao Xie