121
click to vote
ISSS
1999
IEEE
15 years 5 months ago
1999
IEEE
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
80
Voted
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
77
Voted
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
82
Voted
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
In this paper, the theory of information relationships and relationship measures is considered and its application to logic design is discussed. This theory makes operational the ...
111
click to vote
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...
80
Voted
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
This paper considers an optimization method of programmable logic arrays (PLAs), which have two-input EXOR gate at the outputs. The PLA realizes an EXOR of two sum-of-products exp...
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
In the last years two automated reasoning techniques for clause normal form arose in which the use of labels are prominently featured: signed logic and annotated logic programming...
75
Voted
ISMVL
1999
IEEE
15 years 5 months ago
1999
IEEE
ISCAS
1999
IEEE
15 years 5 months ago
1999
IEEE
85
Voted
ISCAS
1999
IEEE
15 years 5 months ago
1999
IEEE
