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89
Voted
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 5 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
83
Voted
ISSS
2002
IEEE
106views Hardware» more  ISSS 2002»
15 years 5 months ago
Securing Wireless Data: System Architecture Challenges
Anand Raghunathan, Nachiketh R. Potlapally, Srivat...
76
Voted
ISSS
2002
IEEE
93views Hardware» more  ISSS 2002»
15 years 5 months ago
Low-Power Data Memory Communication for Application-Specific Embedded Processors
Alex Orailoglu, Peter Petrov
75
Voted
ISSS
2002
IEEE
129views Hardware» more  ISSS 2002»
15 years 5 months ago
System-Level Design of IEEE1394 Bus Segment Bridge
Takao Onoye, Yukihiro Nakamura, Atsuhito Shigiya, ...
71
Voted
ISSS
2002
IEEE
96views Hardware» more  ISSS 2002»
15 years 5 months ago
A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design
Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivasta...
99
Voted
ISSS
2002
IEEE
138views Hardware» more  ISSS 2002»
15 years 5 months ago
An Object-Oriented Design Process for System-on-Chip Using UML
The object-oriented design process has been a hot topic in software development since it will improve product quality and productivity significantly, which is also a major issue i...
Tsuneo Nakata, Akio Matsuda, Minoru Shoji, Shinya ...
83
Voted
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 5 months ago
Round-Robin Arbiter Design and Generation
In this paper, we introduce a Round–robin Arbiter Generator (RAG) tool. The RAG tool can generate a design for a Bus Arbiter (BA). The BA is able to handle the exact number of b...
Vincent John Mooney III, George F. Riley, Eung S. ...
92
Voted
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 5 months ago
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis
We introduce a new approach, “Dynamic Common Sub-expression Elimination (CSE)”, that dynamically eliminates common sub- expressions based on new opportunities created during s...
Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Ni...
73
Voted
ISSS
2002
IEEE
120views Hardware» more  ISSS 2002»
15 years 5 months ago
Optimal Message-Passing for Data Coherency in Distributed Architecture
Message-passing mechanism is commonly used to preserve data coherency in distributed systems. This paper presents an algorithm for insertion of minimal message-passing in system-l...
Daniel Gajski, Junyu Peng
73
Voted
ISSS
2002
IEEE
111views Hardware» more  ISSS 2002»
15 years 5 months ago
System-Level Abstraction Semantics
Daniel Gajski, Andreas Gerstlauer