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113
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VTS
2006
IEEE
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VTS 2006
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Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions
15 years 8 months ago
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www.ece.uic.edu
We tackle the problem of fault-free assumptions in current PLB and interconnect built-in-self-test (BIST) techniques for FPGAs. These assumptions were made in order to develop stro...
Vishal Suthar, Shantanu Dutt
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