Sciweavers

FCCM
2005
IEEE
93views VLSI» more  FCCM 2005»
15 years 2 months ago
Register File Architecture Optimization in a Coarse-Grained Reconfigurable Architecture
This paper investigates the impact of the local and global register file architecture on a reconfigurable system based on the ADRES architecture [3]. The register files consume a s...
Zion Kwok, Steven J. E. Wilton
53
Voted
FCCM
2005
IEEE
96views VLSI» more  FCCM 2005»
15 years 2 months ago
FPGA-Based CDMA Switch for Networks-on-Chip
This paper presents timing and area results for an FPGA implementation of a CDMA-based switch for networkson-chip. The design was mapped onto the Xilinx Virtex4 XC4VLX200 device u...
Daewook Kim, Manho Kim, Gerald E. Sobelman
55
Voted
FCCM
2005
IEEE
107views VLSI» more  FCCM 2005»
15 years 2 months ago
Hardware Solution to Java Compressed Heap
Java technology has been integrated into mobile/wireless computing because of its rich support to portability (crossplatform nature), reusability (development libraries), and shor...
Mayumi Kato, Chia-Tien Dan Lo
47
Voted
FCCM
2005
IEEE
113views VLSI» more  FCCM 2005»
15 years 2 months ago
A Comparison of Floating Point and Logarithmic Number Systems for FPGAs
Michael Haselman, Michael J. Beauchamp, Aaron Wood...
70
Voted
FCCM
2005
IEEE
142views VLSI» more  FCCM 2005»
15 years 2 months ago
FPGA-Based Vector Processing for Solving Sparse Sets of Equations
The solution to a set of sparse linear equations Ax = b, where A is an n×n sparse matrix and b is an n-element vector, can be obtained using the W-matrix method. An enhanced vect...
Muhammad Z. Hasan, Sotirios G. Ziavras
FCCM
2005
IEEE
124views VLSI» more  FCCM 2005»
15 years 2 months ago
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
Arash Hariri, Reza Rastegar, Morteza Saheb Zamani,...
FCCM
2005
IEEE
96views VLSI» more  FCCM 2005»
15 years 2 months ago
Preliminary Report: FPGA Acceleration of Molecular Dynamics Computations
Abstract: Molecular Dynamics (MD) is of central importance to computational chemistry and its myriad applications. Here we show that, at even a preliminary stage of development, MD...
Yongfeng Gu, Tom Van Court, Douglas DiSabello, Mar...
57
Voted
FCCM
2005
IEEE
111views VLSI» more  FCCM 2005»
15 years 2 months ago
A High-Performance Asynchronous FPGA: Test Results
We report test results from a prototype asynchronous FPGA (AFPGA) implemented in TSMC’s 0.18μm CMOS process. The AFPGA uses SRAM-based configuration bits with pipelined logic ...
David Fang, John Teifel, Rajit Manohar
FCCM
2005
IEEE
123views VLSI» more  FCCM 2005»
15 years 2 months ago
A Novel 2D Filter Design Methodology for Heterogeneous Devices
In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve this goal ...
Christos-Savvas Bouganis, George A. Constantinides...
53
Voted
FCCM
2005
IEEE
106views VLSI» more  FCCM 2005»
15 years 2 months ago
The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform
Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Th...