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    FCCM
    2005
    IEEE
    155views VLSI» more  FCCM 2005»
    An Open TCP/IP Core for Reconfigurable Logic
    15 years 2 months ago
    An Open TCP/IP Core for Reconfigurable Logic
    Download  www.ics.forth.gr
    Apostolos Dollas, Ioannis Ermis, Iosif Koidis, Ioa...
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    FCCM
    2005
    IEEE
    89views VLSI» more  FCCM 2005»
    A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms
    15 years 2 months ago
    A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms
    Download  csdl2.computer.org
    Although researchers have presented individual techniques to efficiently utilize the Peripheral Component Interconnect (PCI) bus, their contributions fail to provide a direct path...
    Petersen F. Curt, James P. Durbano, Fernando E. Or...
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    FCCM
    2005
    IEEE
    96views VLSI» more  FCCM 2005»
    A Framework for Rule Processing in Reconfigurable Network Systems
    15 years 2 months ago
    A Framework for Rule Processing in Reconfigurable Network Systems
    Download  www.arl.wustl.edu
    Michael Attig, John W. Lockwood
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    39
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    FCCM
    2005
    IEEE
    73views VLSI» more  FCCM 2005»
    Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation
    15 years 2 months ago
    Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation
    Download  www.doc.ic.ac.uk
    José Gabriel F. Coutinho, Jun Jiang, Wayne ...
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    50
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    FCCM
    2005
    IEEE
    81views VLSI» more  FCCM 2005»
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
    15 years 2 months ago
    Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor
    Download  csdl2.computer.org
    Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsua...
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    63
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    FCCM
    2005
    IEEE
    151views VLSI» more  FCCM 2005»
    Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
    15 years 2 months ago
    Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
    Download  www.vlsi.ee.upatras.gr
    In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts...
    Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
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