109
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ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Gate oxide tunneling current (Igate) is emerging as a key roadblock for device scaling in nanometer-scale CMOS circuits. A practical means to reduce Igate is to leverage dual Tox ...
103
Voted
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
104
click to vote
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the multiple thread contexts available in current processors. We propose a minimal SpM...
89
Voted
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
— With power a major limiting factor in the design of scalable interconnected systems, power-aware networks will become inherent components of single-chip and multi-chip systems....
101
Voted
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
In this paper, an efficient Montgomery multiplier is introduced for the modular exponentiation operation, which is fundamental to numerous public-key cryptosystems. Four aspects a...
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
We selectively generate and optimize the frames constructed by the rePLay architecture statically. Since static analysis provides a global view of the interaction between the basi...
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Large register file with multiple ports, but with a minimal access time, is a critical component in a superscalar processor. Analysis of the lifetime of a logical to physical reg...
86
Voted
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
In this paper, we investigate the core-switch mapping(CSM) problem that optimally maps cores onto an NoC architecture such that either the energy consumption or the congestion is ...
119
click to vote
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
Research in high-speed interconnect requires physical test to validate circuit models and design assumptions. At multi-Gbit/sec rates, physical implementations require custom circ...
ICCD
2004
IEEE
15 years 9 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...