ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. Howeve...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
Languages such as C and C++ use unsafe manual memory management, allowing simple bugs (i.e., accesses to an object after deallocation) to become the root cause of exploitable secu...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
—As the scales of parallel applications and platforms increase the negative impact of communication latencies on performance becomes large. Fortunately, modern High Performance C...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
Over the past two decades, several microarchitectural side channels have been exploited to create sophisticated security attacks. Solutions to this problem have mainly focused on ...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
The reliability of future processors is threatened by decreasing transistor robustness. Current architectures focus on delivering high performance at low cost; lifetime device rel...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
ISCA
2012
IEEE
12 years 2 months ago
2012
IEEE
Single-ISA heterogeneous multi-core processors are typically composed of small (e.g., in-order) power-efficient cores and big (e.g., out-of-order) high-performance cores. The eff...