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106
Voted
DATE
2010
IEEE
120views Hardware» more  DATE 2010»
15 years 10 months ago
Memory testing with a RISC microcontroller
—Many systems are based on embedded microcontrollers. Applications demand for production and Power-On testing, including memory testing. Because low-end microcontrollers may not ...
A. J. van de Goor, Georgi Gaydadjiev, Said Hamdiou...
MTDT
2003
IEEE
83views Hardware» more  MTDT 2003»
15 years 10 months ago
A Fault Primitive Based Analysis of Linked Faults in RAMs
: Linked faults are very important for memory testing because they reduce the fault coverage of the tests. Their analysis has proven to be a source for new memory tests, characteri...
Zaid Al-Ars, Said Hamdioui, A. J. van de Goor
120
Voted
DATE
2003
IEEE
105views Hardware» more  DATE 2003»
15 years 10 months ago
Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation
: Stresses are considered an integral part of any modern industrial DRAM test. This paper describes a novel method to optimize stresses for memory testing, using defect injection a...
Zaid Al-Ars, A. J. van de Goor, Jens Braun, Detlev...