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DAC
1996
ACM
15 years 29 days ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
DAC
2006
ACM
15 years 9 months ago
An efficient retiming algorithm under setup and hold constraints
In this paper we present a new efficient algorithm for retiming sequential circuits with edge-triggered registers under both setup and hold constraints. Compared with the previous...
Chuan Lin, Hai Zhou