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ASPDAC
2005
ACM

Bridging fault testability of BDD circuits

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Bridging fault testability of BDD circuits
Abstract— In this paper we study the testability of circuits derived from Binary Decision Diagrams (BDDs) under the bridging fault model. It is shown that testability can be formulated in terms of symbolic BDD operations. By this, test pattern generation can be carried out in polynomial time. A technique to improve testability is presented. Experimental results show that a complete classification can be carried out very efficiently.
Junhao Shi, Görschwin Fey, Rolf Drechsler
Added 13 Oct 2010
Updated 13 Oct 2010
Type Conference
Year 2005
Where ASPDAC
Authors Junhao Shi, Görschwin Fey, Rolf Drechsler
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