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Computer Architecture
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DAC 1997
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Efficient Testing of Clock Regenerator Circuits in Scan Designs
14 years 1 months ago
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Rajesh Raina, Robert Bailey, Charles Njinda, Rober
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Added
06 Aug 2010
Updated
06 Aug 2010
Type
Conference
Year
1997
Where
DAC
Authors
Rajesh Raina, Robert Bailey, Charles Njinda, Robert F. Molyneaux, Charlie Beh
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