The Pseudo-Exhaustive Test of Sequential Circuits

: The concept of a pseudo-exhaustive test for sequential circuits is introduced in a similar way as it is used for combinational networks. Instead of test sets one has to apply pseudoexhaustive test sequences of a limited length, which provides well-known benefits as far as fault-coverage, self-test capability and simplicity of test generation are concerned. Design methods are presented for hardware segmentation which ensure that a pseudo-exhaustive test is feasible. Example circuits show that the presented test-strategy requires less additional silicon area than a complete scan path.

• Type: Conference
• Year: 1989
• Where: ITC
• Authors: Sybille Hellebrand, Hans-Joachim Wunderlich
• Keywords: Hardware, ITC 1989, Pseudo-exhaustive Test, Pseudoexhaustive Test Sequences, Test Generation