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DAC
2009
ACM
14 years 6 days ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
SEMWEB
2007
Springer
13 years 11 months ago
Semantic Enterprise Technologies
Abstract. Nowadays enterprises request information technologies that leverage structured and unstructured information for providing a single integrated view of business problems in...
Massimo Ruffolo, Luigi Guadagno, Inderbir Sidhu
MICAI
2005
Springer
13 years 11 months ago
Agent-Based Simulation Replication: A Model Driven Architecture Approach
In Multi-agent based simulation (MABS) systems, computational models are built as multi-agent systems (MAS). Replication of these models can contribute to improve the reliability o...
Candelaria Sansores, Juan Pavón
FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
13 years 9 months ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
BIOCOMP
2007
13 years 6 months ago
Stability Analysis of Genetic Regulatory Network with Additive Noises
Background: Genetic regulatory networks (GRN) can be described by differential equations with SUM logic which has been found in many natural systems. Identification of the network...
Yufang Jin