76 search results - page 2 / 16 » A Software-Based Hardware Fault Tolerance Scheme for Multico... |
VTS
2002
IEEE
13 years 10 months ago
2002
IEEE
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
DFT
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we propose a system-level error tolerance scheme for systems where a linear transform is combined with quantization. These are key components in multimedia compress...
FPL
2008
Springer
13 years 6 months ago
2008
Springer
Reliability and process variability are serious issues for FPGAs in the future. Fortunately FPGAs have the ability to reconfigure in the field and at runtime, thus providing oppor...
DSN
2008
IEEE
13 years 7 months ago
2008
IEEE
CMOS technology trends are leading to an increasing incidence of hard (permanent) faults in processors. These faults may be introduced at fabrication or occur in the field. Wherea...
FPL
2005
Springer
13 years 10 months ago
2005
Springer
This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...