— We present an efficient technique for the fast and accurate extraction of inductance of large-scale on-chip interconnects. Several simulation techniques exploit the sparsity o...
Jitesh Jain, Hong Li, Cheng-Kok Koh, Venkataramana...
Abstract— The sparsification of the reluctance matrix L−1 (where L denotes the usual inductance matrix L) has been widely used in several recent investigations to make the pro...
Hong Li, Venkataramanan Balakrishnan, Cheng-Kok Ko...
To efficiently analyze the large-scale interconnect dominant circuits with inductive couplings (mutual inductances), this paper introduces a new state matrix, called VNA, to stamp ...
Hao Yu, Chunta Chu, Yiyu Shi, David Smart, Lei He,...
Modeling on-chip inductive effects for interconnects of multigigahertz microprocessors remains challenging. SPICE simulation of these effects is very slow because of the large num...
Xiaoning Qi, Goetz Leonhardt, Daniel Flees, Xiao-D...