46 search results - page 1 / 10 » A high performance bus communication architecture through bu... |
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
Abstract— A split shared-bus architecture with multiple simultaneous bus accesses is proposed. Compared to traditional bus architectures, the performance of proposed architecture...
ICCAD
2003
IEEE
14 years 1 months ago
2003
IEEE
A high performance communication architecture, SAMBA-bus, is proposed in this paper. In SAMBA-bus, multiple compatible bus transactions can be performed simultaneously with only a...
TVLSI
2008
13 years 4 months ago
2008
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
– Modern multi-processor system-on-chip (MPSoC) designs have high bandwidth constraints which must be satisfied by the underlying communication architecture. Bus matrix based com...
ICRA
2007
IEEE
13 years 11 months ago
2007
IEEE
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...