17 search results - page 1 / 4 » An FPGA architecture for CABAC decoding in manycore systems |
ASAP
2008
IEEE
13 years 7 months ago
2008
IEEE
Arithmetic coding is an efficient entropy compression method that achieves results close to the entropy limit and it is used in modern standards such as JPEG-2000 and H.264. Arith...
ERSA
2006
13 years 6 months ago
2006
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
DAC
2010
ACM
13 years 5 months ago
2010
ACM
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
TVLSI
2008
13 years 4 months ago
2008
Multiple-input
INTEGRATION
2008
13 years 3 months ago
2008
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...