8 search results - page 1 / 2 » An adaptive on-chip voltage regulation technique for low-pow... |
DAC
2007
ACM
14 years 5 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
IOLTS
2005
IEEE
13 years 10 months ago
2005
IEEE
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
ISLPED
2000
ACM
13 years 9 months ago
2000
ACM
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
ISLPED
2004
ACM
13 years 10 months ago
2004
ACM
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...