23 search results - page 1 / 5 » An asynchronous fpga logic cell implementation |
GLVLSI
2007
IEEE
13 years 8 months ago
2007
IEEE
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
ERSA
2008
13 years 6 months ago
2008
This paper presents a novel architecture to increase the hardware utilization in multi-context field programmable gate arrays (MC-FPGAs). Conventional MC-FPGAs use dedicated tracks...
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
— This is the first implementation of an FPGA based on autonomous fine-grain power-gating. To cut the power consumption of clock network and detect the activity of the cell e...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper describes a novel design methodology to implement a secure DPA resistant crypto processor. The methodology is suitable for integration in a common automated standard ce...