30 search results - page 5 / 6 » An effective power mode transition technique in MTCMOS circu... |
ATS
2009
IEEE
14 years 2 days ago
2009
IEEE
Power distribution network (PDN) designs for today’s high performance integrated circuits (ICs) typically occupy a significant share of metal resources in the circuit, and henc...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
Energy recovery clocking has been demonstrated as an effective method for reducing the clock power. In this method the conventional square wave clock signal is replaced by a sinus...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
VLSID
2008
IEEE
14 years 5 months ago
2008
IEEE
Real-time embedded systems increasingly rely on dynamic power management to balance between power and performance goals. In this paper, we present a technique for continuous frequ...
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
A new circuit technique based on a single PMOS sleep transistor and a dual threshold voltage CMOS technology is proposed in this paper for simultaneously reducing subthreshold and...