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» Analysing the Robustness of Surfing Circuits
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ENTCS
2006
157views more  ENTCS 2006»
13 years 5 months ago
Analysing the Robustness of Surfing Circuits
Suwen Yang, Mark R. Greenstreet
IOLTS
2007
IEEE
98views Hardware» more  IOLTS 2007»
13 years 11 months ago
Robustness of circuits under delay-induced faults : test of AES with the PAFI tool
Security of cryptographic circuits is a major concern. Fault attacks are a mean to obtain critical information with the use of physical disturbance and cryptanalysis. We propose a...
Olivier Faurax, Assia Tria, Laurent Freund, Fr&eac...
IFIP
2005
Springer
13 years 10 months ago
A Logic for Analysing Subterfuge in Delegation Chains
Abstract. Trust Management is an approach to construct and interpret the trust relationships among public-keys that are used to mediate security-critical actions. Cryptographic cre...
Hongbin Zhou, Simon N. Foley
DATE
2009
IEEE
141views Hardware» more  DATE 2009»
13 years 8 months ago
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic agains...
Victor Lomné, Philippe Maurine, Lionel Torr...
DATE
2002
IEEE
151views Hardware» more  DATE 2002»
13 years 10 months ago
Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets
In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worst-case parameter sets. These set...
Robert Schwencker, Frank Schenkel, Michael Pronath...