29 search results - page 4 / 6 » Architectural Exploration of the ADRES Coarse-Grained Reconf... |
CASES
2008
ACM
13 years 7 months ago
2008
ACM
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
IPPS
2005
IEEE
13 years 11 months ago
2005
IEEE
We propose in this paper an original design space exploration method for reconfigurable architectures adapted to fine and coarse grain resources. The exploration flow deals with c...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
13 years 5 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...