90 search results - page 2 / 18 » Architectural-Level Soft-Error Modeling for Estimating Relia... |
DAC
2005
ACM
13 years 8 months ago
2005
ACM
Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
DATE
2006
IEEE
14 years 8 days ago
2006
IEEE
Soft errors have emerged as an important reliability challenge for nanoscale VLSI designs. In this paper, we present a fast and efficient soft error rate (SER) computation algorit...
IOLTS
2005
IEEE
13 years 11 months ago
2005
IEEE
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
ISQED
2006
IEEE
14 years 6 days ago
2006
IEEE
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
IPPS
2007
IEEE
14 years 15 days ago
2007
IEEE
Assessing reliability at early stages of software development, such as at the level of software architecture, is desirable and can provide a cost-effective way of improving a soft...