Sciweavers

47 search results - page 2 / 10
» Assignment Stack Shrinking
Sort
View
VLSID
2010
IEEE
190views VLSI» more  VLSID 2010»
13 years 3 months ago
Rethinking Threshold Voltage Assignment in 3D Multicore Designs
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature...
Koushik Chakraborty, Sanghamitra Roy
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
13 years 7 months ago
On multiple-voltage high-level synthesis using algorithmic transformations
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
Hsueh-Chih Yang, Lan-Rong Dung
SLIP
2009
ACM
13 years 11 months ago
Integrated interlayer via planning and pin assignment for 3D ICs
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
Xu He, Sheqin Dong, Xianlong Hong, Satoshi Goto
GCB
2006
Springer
158views Biometrics» more  GCB 2006»
13 years 9 months ago
Microarray Layout as Quadratic Assignment Problem
Abstract: The production of commercial DNA microarrays is based on a light-directed chemical synthesis driven by a set of masks or micromirror arrays. Because of the natural proper...
Sérgio A. de Carvalho, Sven Rahmann
TVLSI
2010
12 years 12 months ago
Dynamic and Leakage Energy Minimization With Soft Real-Time Loop Scheduling and Voltage Assignment
With the shrinking of technology feature sizes, the share of leakage in total power consumption of digital systems continues to grow. Traditional dynamic voltage scaling (DVS) fail...
Meikang Qiu, Laurence Tianruo Yang, Zili Shao, Edw...