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» BIST Based Interconnect Fault Location for FPGAs
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ICCAD
2000
IEEE
104views Hardware» more  ICCAD 2000»
13 years 9 months ago
Diagnosis of Interconnect Faults in Cluster-Based FPGA Architectures
— Fault diagnosis has particular importance in the context of field programmable gate arrays (FPGAs) because faults can be avoided by reconfiguration at almost no real cost. Cl...
Ian G. Harris, Russell Tessier
ACST
2006
13 years 6 months ago
A combinatorial group testing method for FPGA fault location
Adaptive fault isolation methods based on discrepancyenabled pairwise comparisons are developed for reconfigurable logic devices. By observing the discrepancy characteristics of m...
Carthik A. Sharma, Ronald F. DeMara
FPL
2005
Springer
119views Hardware» more  FPL 2005»
13 years 11 months ago
Yield modelling and Yield Enhancement for FPGAs using Fault Tolerance Schemes
This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
FPL
2006
Springer
99views Hardware» more  FPL 2006»
13 years 9 months ago
Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs
As manufacturing technology enters the ultra-deep submicron era, wafer yields are destined to drop due to higher occurrence of physical defects on the die. This paper proposes a y...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
13 years 10 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati