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TVLSI
2008
133views more  TVLSI 2008»
13 years 5 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
ICCAD
1995
IEEE
94views Hardware» more  ICCAD 1995»
13 years 9 months ago
Test register insertion with minimum hardware cost
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
Albrecht P. Stroele, Hans-Joachim Wunderlich
ERSA
2010
187views Hardware» more  ERSA 2010»
13 years 3 months ago
An Open Source Circuit Library with Benchmarking Facilities
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
Mariusz Grad, Christian Plessl
SC
2000
ACM
13 years 9 months ago
Improving Fine-Grained Irregular Shared-Memory Benchmarks by Data Reordering
We demonstrate that data reordering can substantially improve the performance of fine-grained irregular sharedmemory benchmarks, on both hardware and software shared-memory syste...
Y. Charlie Hu, Alan L. Cox, Willy Zwaenepoel
USENIX
2008
13 years 7 months ago
Cutting Corners: Workbench Automation for Server Benchmarking
A common approach to benchmarking a server is to measure its behavior under load from a workload generator. Often a set of such experiments is required-perhaps with different serv...
Piyush Shivam, Varun Marupadi, Jeffrey S. Chase, T...