63 search results - page 5 / 13 » CMOS gate modeling based on equivalent inverter |
CHES
2005
Springer
13 years 11 months ago
2005
Springer
In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate...
TCAD
2002
13 years 5 months ago
2002
We develop a general methodology to analyze crosstalk effects that are likely to cause errors in deep submicron high speed circuits. We focus on crosstalk due to capacitive coupli...
ISCAS
2007
IEEE
14 years 2 days ago
2007
IEEE
— In this paper we describe an implementation and modeling of a novel fatigue monitoring sensor based on integration of piezoelectric transduction with floating gate avalanche in...
EURODAC
1995
IEEE
13 years 9 months ago
1995
IEEE
Based on an explicit formulation of delays, an improved model for low voltage operation of CMOS inverter has been derived. Extrinsic and intrinsic effects, such as transistor curr...
ISQED
2003
IEEE
13 years 11 months ago
2003
IEEE
— The design of an efficient monolithic buck converter is presented in this paper. A low swing MOSFET gate drive technique is proposed that improves the efficiency characteristic...