36 search results - page 6 / 8 » Can multipath mitigate power law delays |
ISVLSI
2003
IEEE
13 years 11 months ago
2003
IEEE
Three-dimensional integration technologies have been proposed in order to mitigate design challenges posed by deep-submicron interconnect. By providing multiple layers of active d...
ISQED
2010
IEEE
13 years 7 months ago
2010
IEEE
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...
ISCA
2002
IEEE
13 years 10 months ago
2002
IEEE
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
ISCA
2009
IEEE
14 years 13 days ago
2009
IEEE
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
INFOCOM
2010
IEEE
13 years 4 months ago
2010
IEEE
—Inter-contact time between moving vehicles is one of the key metrics in vehicular ad hoc networks (VANETs) and central to forwarding algorithms and the end-to-end delay. Due to ...