4 search results - page 1 / 1 » Concurrent flip-flop and repeater insertion for high perform... |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
TVLSI
2010
12 years 11 months ago
2010
A new approach for resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resu...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...