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GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
13 years 9 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
DAC
2000
ACM
14 years 5 months ago
An architecture-driven metric for simultaneous placement and global routing for FPGAs
FPGA routing resources typically consist of segments of various lengths. Due to the segmented routing architectures, the traditional measure of wiring cost (wirelength, delay, con...
Yao-Wen Chang, Yu-Tsang Chang
DAC
2003
ACM
14 years 5 months ago
Improved global routing through congestion estimation
In this paper, we present a new method to improve global routing results. By using an amplified congestion estimate to influence a rip-up and reroute approach, we obtain substanti...
Raia Hadsell, Patrick H. Madden
ASPDAC
2009
ACM
164views Hardware» more  ASPDAC 2009»
13 years 8 months ago
High-performance global routing with fast overflow reduction
Global routing is an important step for physical design. In this paper, we develop a new global router, NTUgr, that contains three major steps: prerouting, initial routing, and enh...
Huang-Yu Chen, Chin-Hsiung Hsu, Yao-Wen Chang
GLVLSI
2000
IEEE
145views VLSI» more  GLVLSI 2000»
13 years 9 months ago
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...
Cheng-Kok Koh, Patrick H. Madden