25 search results - page 5 / 5 » Cooperative cache partitioning for chip multiprocessors |
MICRO
2006
IEEE
13 years 11 months ago
2006
IEEE
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Efficient management of last level caches (LLCs) plays an important role in bridging the performance gap between processor cores and main memory. This paper is motivated by two key...
ASAP
2008
IEEE
13 years 11 months ago
2008
IEEE
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
CASES
2006
ACM
13 years 10 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...