27 search results - page 3 / 6 » Cost-free scan: a low-overhead scan path design |
DATE
1997
IEEE
13 years 9 months ago
1997
IEEE
This paper presents a testability analysis and improvement technique for the controller of an RT level design. It detects hard-to-reachstates by analyzing both the data path and t...
ASPDAC
1995
ACM
13 years 8 months ago
1995
ACM
Abstract - An approach to top down design for testability using register-transfer level(RTL) partial scan selection is described. We propose a scan selection technique based on tes...
IJFCS
1998
13 years 4 months ago
1998
Directed acyclic graphs (dags) are often used to model circuits. Path lengths in such dags represent circuit delays. In the vertex splitting problem, the objective is to determine...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...
ITC
1997
IEEE
13 years 9 months ago
1997
IEEE
Tri-state buses and pass transistor logic are used in many complex applications to achieve high performance and small area. Such circuits often contain logic requiring one-hot sig...