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» Cost-free scan: a low-overhead scan path design
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ITC
1989
IEEE
70views Hardware» more  ITC 1989»
13 years 9 months ago
The Pseudo-Exhaustive Test of Sequential Circuits
: The concept of a pseudo-exhaustive test for sequential circuits is introduced in a similar way as it is used for combinational networks. Instead of test sets one has to apply pse...
Sybille Hellebrand, Hans-Joachim Wunderlich
ITC
1999
IEEE
78views Hardware» more  ITC 1999»
13 years 9 months ago
Minimized power consumption for scan-based BIST
Power consumption of digital systems may increase significantly during testing. In this paper, systems equipped with a scan-based built-in self-test like the STUMPS architecture a...
Stefan Gerstendörfer, Hans-Joachim Wunderlich
IWMM
2007
Springer
110views Hardware» more  IWMM 2007»
13 years 11 months ago
Path: page access tracking to improve memory management
Traditionally, operating systems use a coarse approximation of memory accesses to implement memory management algorithms by monitoring page faults or scanning page table entries. ...
Reza Azimi, Livio Soares, Michael Stumm, Thomas Wa...
JCB
2008
52views more  JCB 2008»
13 years 5 months ago
Spectrum-Based De Novo Repeat Detection in Genomic Sequences
A novel approach to the detection of genomic repeats is presented in this paper. The technique, dubbed SAGRI (Spectrum Assisted Genomic Repeat Identifier), is based on the spectru...
Huy Hoang Do, Kwok Pui Choi, Franco P. Preparata, ...
DAC
2006
ACM
14 years 6 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram